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| HI-201HS TM Data Sheet July 2000 File Number 3123.3 High Speed, Quad SPST, CMOS Analog Switch The HI-201HS is a monolithic CMOS Analog Switch featuring very fast switching speeds and low ON resistance. The integrated circuit consists of four independently selectable SPST switches and is pin compatible with the industry standard HI-201 switch. Fabricated using silicon-gate technology and the Intersil Dielectric Isolation process, this TTL compatible device offers improved performance over previously available CMOS analog switches. Featuring maximum switching times of 50ns, low ON resistance of 50 maximum, and a wide analog signal range, the HI-201HS is designed for any application where improved switching performance, particularly switching speed, is required. (A more detailed discussion on the design and application of the HI-201HS can be found in Application Note AN543.) Features * Fast Switching Times - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns * Low "ON" Resistance . . . . . . . . . . . . . . . . . . . . . . . . 30 * Pin Compatible with Standard HI-201 * Wide Analog Voltage Range (15V Supplies) . . . . . . . 15V * Low Charge Injection (15V Supplies) . . . . . . . . . . 10pC * TTL Compatible * Symmetrical Switching Analog Current Range . . . . . 80mA Applications * High Speed Multiplexing * High Frequency Analog Switching * Sample and Hold Circuits Ordering Information PART NUMBER HI1-0201HS-2 HI1-0201HS-4 HI1-0201HS-5 HI3-0201HS-5 HI9P0201HS-5 HI9P0201HS-9 TEMP. RANGE (oC) -55 to 125 -25 to 85 0 to 75 0 to 75 0 to 75 -40 to 85 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld SOIC 16 Ld SOIC PKG. NO. F16.3 F16.3 F16.3 E16.3 M16.3 M16.3 * Digital Filters * Operational Amplifier Gain Switching Networks * Integrator Reset Circuits Pinout (Switches Shown For Logic "1" Input) HI-201HS (CERDIP, PDIP, SOIC) TOP VIEW A1 OUT1 IN1 VGND IN4 OUT4 A4 1 2 3 4 5 6 7 8 16 A2 15 OUT2 14 IN2 13 V+ 12 NC 11 IN3 10 OUT3 9 A3 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000 HI-201HS Functional Diagram V+ SOURCE TTL LOGIC INPUT LEVEL SHIFTER AND DRIVER SWITCH CELL GATE GATE INPUT TRUTH TABLE LOGIC 0 1 SWITCH ON OFF DRAIN OUTPUT V- Schematic Diagrams TTL/CMOS REFERENCE CIRCUIT V+ P41 MP42 MP43 MP44 MP45 SWITCH CELL V+ Q QN41 QN43 QN42 D41 5V R42 C48 QP44 QN44 R41 C49 D42 5.6V QP41 QP42 VQ QN45 VR1 ANALOG IN MP32 MN33 MN31 MP33 MN32 ANALOG OUT MP31 MN42 V- MN44 MN45 2 HI-201HS Schematic Diagrams (Continued) DIGITAL INPUT BUFFER AND LEVEL SHIFTER MN46 MP51 MP52 QN6 QN8 QN7 IX1 VR1 IX2 QN9 MP3 MP5 MP6 MP4 MP7 MP9 MP10 MP11 MP12 MP8 IQ IX3 IX4 QN1 IQ C1 VA R1 QN4 QP1 VR1 QP5 QP4 R3 R2 QP2 CFF IX1 IX2 QP6 QP8 MN51 REPEAT FOR EACH LEVEL SHIFTER MN52 QP7 QP9 MN3 MN5 MN4 MN6 MN7 MN9 MN8 MN10 MN13 MN14 QN5 MN11 VEE QN2 VCC Q C2 MP13 MP14 MN12 Q IX3 3 HI-201HS Absolute Maximum Ratings Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+) +4V to (V-) -4V Analog Input Voltage (One Switch) . . . . . . . (V+) +2.0V to (V-) -2.0V Peak Current, S or D (Pulse 1ms, 10% Duty Cycle Max) . . . . 50mA Continuous Current Any Terminal (Except S or D) . . . . . . . . . 25mA Thermal Information Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 80 20 PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A Maximum Junction Temperature Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature. . . . . . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Ranges HI-201HS-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC HI-201HS-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC HI-201HS-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC HI-201HS-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V, Unless Otherwise Specified TEST CONDITIONS TEMP (oC) -2 MIN TYP MAX MIN -4, -5, -9 TYP MAX UNITS PARAMETER DYNAMIC CHARACTERISTICS Switch ON Time, tON Switch OFF Time, tOFF1 Switch OFF Time, tOFF2 Output Settling Time Charge Injection, Q OFF Isolation Crosstalk Input Switch Capacitance, CS(OFF) Output Switch Capacitance CD(OFF) CD(ON) Digital Input Capacitance, CA Drain-To-Source Capacitance, CDS(OFF) DIGITAL INPUT CHARACTERISTICS Input Low Threshold, VAL Input High Threshold, VAH (Note 3) (Note 3) (Note 3) To 0.1% (Note 6) (Note 4) (Note 5) 25 25 25 25 25 25 25 25 25 25 25 25 - 30 40 150 180 10 72 86 10 10 30 18 0.5 50 50 - - 30 40 150 180 10 72 86 10 10 30 18 0.5 50 50 - ns ns ns ns pC dB dB pF pF pF pF pF Full 25 Full 2.0 2.4 - 200 20 - 0.8 500 40 2.0 2.4 - 200 20 - 0.8 500 40 V V V A A A A Input Leakage Current (Low), IAL 25 Full Input Leakage Current (High), IAH VAH = 4.0V 25 Full ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VS ON Resistance, rON (Note 2) Full 25 Full -15 30 +15 50 75 -15 30 +15 50 75 V 4 HI-201HS Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) 25 25 Full OFF Output Leakage Current, ID(OFF) 25 Full ON Leakage Current, ID(ON) 25 Full POWER SUPPLY CHARACTERISTICS (Note 7) Power Dissipation, PD 25 Full Current, I+ (Pin 13) 25 Full Current, I- (Pin 4) 25 Full NOTES: 2. VOUT = 10V, IOUT = 1mA. 3. RL = 1k, CL = 35pF, VIN = +10V, VA = +3V. (See Figure 1). 4. VA = 3V, RL = 1k, CL = 10pF, VIN = 3VRMS , f = 100kHz. 5. VA = 3V, RL = 1k, VIN = 3VRMS , f = 100kHz. 6. CL = 1nF, VIN = 0V, Q = CL x VO . 7. VA = 3V or VA = 0 for all switches. 120 4.5 3.5 240 10.0 6 120 4.5 3.5 240 10.0 6 mW mW mA mA mA mA -2 MIN TYP 3 0.3 0.3 0.1 MAX 10 100 10 100 10 100 MIN -4, -5, -9 TYP 3 0.3 0.3 0.1 MAX 10 50 10 50 10 50 UNITS % nA nA nA nA nA nA PARAMETER rON Match OFF Input Leakage Current, IS(OFF) Test Circuits and Waveforms V = 3.0V DIGITAL AH INPUT 50% VAL = 0V 50% tOFF1 tON 90% SWITCH OUTPUT 0V 90% tOFF2 10% TOP: Logic Input (2V/Div.) BOTTOM: Output (5V/Div.) HORIZONTAL: 100ns/Div. FIGURE 1A. MEASUREMENT POINTS FIGURE 1B. WAVEFORMS 5 HI-201HS Test Circuits and Waveforms (Continued) V+ = +15V 13 SWITCH INPUT VIN = +10V VA LOGIC INPUT 3 2 RL 1k SWITCH OUTPUT VO CL 35pF 1 5 4 VO = VIN V- = -15V RL RL + rON GND CL INCLUDES CFIXTURE + CPROBE FIGURE 1C. TEST CIRCUIT FIGURE 1. SWITCH tON AND tOFF LOGIC INPUT (V) 3 2 1 0 +10 +5 0 tO tO FIGURE 2A. LOGIC INPUT WAVEFORM FIGURE 2B. VIN = +10V +5 0 +5 0 +5 tO tO FIGURE 2C. VIN = +5V FIGURE 2D. VIN = 0V 6 HI-201HS Test Circuits and Waveforms (Continued) 0 -5 0 -5 -10 tO tO FIGURE 2E. VIN = -5V FIGURE 2F. VIN = -10V FIGURE 2. SWITCHING WAVEFORMS FOR VARIOUS ANALOG INPUT VOLTAGES Application Information Logic Compatibility The HI-201HS is TTL compatible. Its logic inputs (pins 1, 8, 9, and 16) are designed to react to digital inputs which exceed a fixed, internally generated TTL switching threshold. The HI-201HS can also be driven with CMOS logic (0V15V), although the switch performance with CMOS logic will be inferior to that with TTL logic (0V-5V). The logic input design of the HI-201HS is largely responsible for its fast switching speed. It is a design which features a unique input stage consisting of complementary vertical PNP and NPN bipolar transistors. This design differs from that of the standard HI-201 product where the logic inputs are MOS transistors. Although the new logic design enhances the switching speed performance, it also increases the logic input leakage currents. Therefore, the HI-201HS will exhibit larger digital input leakage currents in comparison to the standard HI-201 product. Power Supply Considerations The electrical characteristics specified in this data sheet are guaranteed for power supplies VS = 15V. Power supply voltages less than 15V will result in reduced switch performance. The following information is intended as a design aid only. POWER SUPPLY VOLTAGES 12 VS 15V VS < 12V SWITCH PERFORMANCE Minimal Variation Parametric variation becomes increasingly large (increased ON resistance, longer switching times). Not Recommended. Not Recommended. VS < 10V VS > 16V Single Supply The switch operation of the HI-201HS is dependent upon an internally generated switching threshold voltage optimized for 15V power supplies. The HI-201HS does not provide the necessary internal switching threshold in a single supply system. Therefore, if single supply operation is required, the HI-300 series of switches is recommended. The HI-300 series will remain operational to a minimum +5V single supply. Switch performance will degrade as power supply voltage is reduced from optimum levels (15V). So it is recommended that a single supply design be thoroughly evaluated to ensure that the switch will meet the requirements of the application. For further information see Application Notes AN520, AN521, AN531, AN532, AN543 and AN557. Charge Injection Charge injection is the charge transferred, through the internal gate-to-channel capacitances, from the digital logic input to the analog output. To optimize charge injection performance for the HI-201HS, it is advisable to provide a TTL logic input with fast rise and fall times. If the power supplies are reduced from 15V, charge injection will become increasingly dependent upon the digital input frequency. Increased logic input frequency will result in larger output error due to charge injection. 7 HI-201HS Typical Performance Curves 80 V+ = +15V, V- = -15V 70 ON RESISTANCE () ON RESISTANCE () 60 50 40 30 -55oC 20 10 0 -15 125oC 25oC 70 60 50 40 30 20 10 -10 -5 0 5 10 15 0 -15 V+ = +12V, V- = -12V V+ = +15V, V- = -15V 80 TA = 25oC V+ = +8V, V- = -8V V+ = +10V, V- = -10V -10 -5 0 5 10 15 ANALOG INPUT (V) ANALOG INPUT (V) FIGURE 3. ON RESISTANCE vs ANALOG SIGNAL LEVEL FIGURE 4. ON RESISTANCE vs ANALOG SIGNAL LEVEL 100.0 100.0 LEAKAGE CURRENT (nA) 10.0 LEAKAGE CURRENT (nA) 25 75 TEMPERATURE (oC) 125 10.0 1.0 1.0 0.10 0.10 0.01 0.01 25 75 TEMPERATURE (oC) 125 FIGURE 5. IS(OFF) OR ID(OFF) vs TEMPERATURE FIGURE 6. ID(ON) vs TEMPERATURE oC. But due to environmental conditions, leakage measurements below this temperature Theoretically, leakage current will continue to decrease below 25 are not representative of actual switch performance. 7 V+ = +15V, V- = -15V 6 SUPPLY CURRENT (mA) 5 I+ 4 I3 2 1 0 -55 LEAKAGE CURRENT (pA) 25 45 65 85 105 125 -35 -15 5 TEMPERATURE (oC) 100 80 V+ = +15V, V- = -15V 60 IS(OFF) VD = 0V 40 ID(OFF) VS = 0V 20 IDON 0 -20 -40 -60 IS(OFF) /ID(OFF) -80 -100 -120 -140 -160 -180 -200 -14 -12 -10 -8 -6 -4 -2 0 2 4 ANALOG INPUT (V) 6 8 10 12 14 FIGURE 7. SUPPLY CURRENT vs TEMPERATURE FIGURE 8. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE 8 HI-201HS Typical Performance Curves 60 40 VAL = 0V, VAH2 = 3V, VAH1 = 5V 20 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 -240 -260 -280 25 45 55 65 75 85 35 TEMPERATURE (oC) (Continued) 10 9 V+ = +15V, V- = -15V, TA = 25oC 8I S(OFF) VD = 0V 7 6 ID(OFF) VS = 0V 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -16.0 -15.5 -15.0 -14.5 -14.0 14.0 IAH1 LEAKAGE CURRENT (nA) 115 125 LEAKAGE CURRENT (A) IAH2 IAL 95 105 14.5 15.0 15.5 16.0 ANALOG INPUT (V) FIGURE 9. DIGITAL INPUT LEAKAGE CURRENT vs TEMPERATURE FIGURE 10. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE Theoretically, leakage current will continue to decrease below 25oC. But due to environmental conditions, leakage measurements below this temperature are not representative of actual switch performance. 180 160 140 SWITCHING TIME (ns) SWITCHING TIME (ns) 120 100 80 60 40 20 0 -55 -35 tON -15 5 25 45 65 85 105 125 0 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) tOFF1 250 200 150 100 50 tON tOFF1 tOFF2 V+ = +15V V- = -15V RL = 1k CL = 35pF tOFF2 350 RL = 1k, CL = 35pF, TA = 25oC 300 TEMPERATURE (oC) FIGURE 11. SWITCHING TIME vs TEMPERATURE FIGURE 12. SWITCHING TIME vs SUPPLY VOLTAGE 350 300 SWITCHING TIME (ns) 250 200 150 100 50 0 5 6 7 8 9 10 11 12 13 POSITIVE SUPPLY (V) tOFF1 tON 14 15 V- = -15V, RL = 1k CL = 35pF, TA = 25oC SWITCHING TIME (ns) 350 300 250 200 150 100 50 0 -5 V+ = +15V, RL = 1k CL = 35pF, TA = 25oC tOFF2 tOFF2 tOFF1 tON -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 NEGATIVE SUPPLY (V) FIGURE 13. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE FIGURE 14. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE 9 HI-201HS Typical Performance Curves 350 V + = +15V, V- = -15V, RL = 1k INPUT LOGIC THRESHOLD (V) 300 SWITCHING TIME (ns) 250 200 150 100 50 0 0 1 2 3 DIGITAL INPUT VOLTAGE (V) 4 5 tOFF1 tON 0 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) tOFF2 CL = 35pF, VAL = 0V, TA = 25oC 2.5 2.0 1.8 1.5 1.0 0.5 (Continued) 3.0 FIGURE 15. SWITCHING TIME vs INPUT LOGIC VOLTAGE FIGURE 16. INPUT SWITCHING THRESHOLD vs SUPPLY VOLTAGE 40 50 40 CHARGE INJECTION (pC) CAPACITANCE (pF) 30 20 10 0 -10 -20 -30 -40 -50 -10 -5 V+ = +15V, V- = -15V CL = 1nF 0 ANALOG INPUT (V) 5 10 5 0 -15 CDS(OFF) -10 -5 0 5 ANALOG INPUT (V) 10 15 Q = CL x VO Q VA CL IN OUT VO 35 30 25 20 15 10 CD(OFF) OR CS(OFF) CD(ON) FIGURE 17. CHARGE INJECTION vs ANALOG VOLTAGE FIGURE 18. CAPACITANCE vs ANALOG VOLTAGE 140 120 OFF ISOLATION (dB) 100 80 V+ = +15V, V- = -15V VIN = 3VRMS , VA = 3V 140 V+ = +15V, V- = -15V 120 100 80 60 40 20 CROSSTALK = 20 Log 1M 10M 0 10K VIN IN OUT VO1 RL = 1k VO2 RL = 1k VO2 VO1 10M VIN = 3VRMS , VA = 3V RL = 100 60 40 20 VIN IN OUT VO RL VIN VO RL = 1k OFF ISOLATION = 20 Log 100K 0 10K CROSSTALK (dB) FREQUENCY (Hz) 100K 1M FREQUENCY (Hz) FIGURE 19. OFF ISOLATION vs FREQUENCY FIGURE 20. CROSSTALK vs FREQUENCY 10 HI-201HS Die Characteristics DIE DIMENSIONS 2440m x 2860m x 485m METALLIZATION Type: CuAl Thickness: 16kA 2kA PASSIVATION Type: Nitride Over Silox Nitride Thickness: 3.5kA 1kA Silox Thickness: 12kA 2kA WORST CASE CURRENT DENSITY 9.5 x 104 A/cm2 Metallization Mask Layout HI-201HS A1 A2 OUT1 OUT2 IN1 IN2 V- V+ GND IN4 IN3 OUT4 OUT3 A4 A3 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 11 |
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